refactor: fill gaps #2

Merged

RossComputerGuy merged 20 commits from fill-gaps into master

2026-07-22 04:06:49 +00:00

RossComputerGuy commented

2026-07-18 18:00:38 +00:00

(Migrated from github.com)

Implements various features and improvements other compilers such as LLVM & GCC have that are missing from Vulcan. This has yielded more performance.

Performance

Measured with zig build run-uarch-bench on an Ampere Altra (Neoverse N1) host,
master (80f7914) vs this branch (9158a43), averaged over 3 runs. Each
kernel is JIT-compiled and its baseline/tuned outputs are checked bit-for-bit
before timing, so these are verified-correct cycle counts, not just "it built".

base = plain isel, microarch optimizer off (isolates the codegen-quality
work in this branch: the Wimmer-Franz allocator, block layout, jump threading,
address folding).
tuned = full stack with the microarch optimizer on.
Speedup > 1.0x means this branch is faster than master.

kernel	base speedup	tuned speedup
sum-loop	1.33x	1.54x
strided-sum	1.40x	1.13x
mem-add	1.21x	1.05x
mem-mul-add	1.06x	1.05x
slp-adds	1.06x	1.06x
mul-chain	0.99x	0.97x
fma-chain	0.93x	0.93x

Summary: sizable wins on loop and memory-bound kernels (sum-loop up to
1.54x, strided-sum 1.40x on base isel, mem-add 1.21x), driven by the cross-block
register allocation and layout work. Very short straight-line dependency chains
(mul-chain, fma-chain, ~17-18 cycles) are flat to about 1 cycle slower,
within measurement noise. All kernels verify bit-for-bit against their baseline.

Four additional kernels land on this branch with no master equivalent
(pressure, mem-pair, saxpy-loop, fsum-loop); for reference their tuned
speedups over their own baseline are saxpy 1.79x and fsum 3.93x.

Implements various features and improvements other compilers such as LLVM & GCC have that are missing from Vulcan. This has yielded more performance. ## Performance Measured with `zig build run-uarch-bench` on an Ampere Altra (Neoverse N1) host, `master` (`80f7914`) vs this branch (`9158a43`), averaged over 3 runs. Each kernel is JIT-compiled and its baseline/tuned outputs are checked bit-for-bit before timing, so these are verified-correct cycle counts, not just "it built". - **base** = plain isel, microarch optimizer off (isolates the codegen-quality work in this branch: the Wimmer-Franz allocator, block layout, jump threading, address folding). - **tuned** = full stack with the microarch optimizer on. - Speedup > 1.0x means this branch is faster than `master`. | kernel | base speedup | tuned speedup | |---|--:|--:| | sum-loop | **1.33x** | **1.54x** | | strided-sum | **1.40x** | **1.13x** | | mem-add | **1.21x** | 1.05x | | mem-mul-add | 1.06x | 1.05x | | slp-adds | 1.06x | 1.06x | | mul-chain | 0.99x | 0.97x | | fma-chain | 0.93x | 0.93x | **Summary:** sizable wins on loop and memory-bound kernels (sum-loop up to 1.54x, strided-sum 1.40x on base isel, mem-add 1.21x), driven by the cross-block register allocation and layout work. Very short straight-line dependency chains (`mul-chain`, `fma-chain`, ~17-18 cycles) are flat to about 1 cycle slower, within measurement noise. All kernels verify bit-for-bit against their baseline. Four additional kernels land on this branch with no `master` equivalent (`pressure`, `mem-pair`, `saxpy-loop`, `fsum-loop`); for reference their tuned speedups over their own baseline are saxpy 1.79x and fsum 3.93x.